1. Field of the Invention
The present invention generally relates to a semiconductor device and a stacked semiconductor device as well as methods of forming the same.
Priority is claimed on Japanese Patent Application No. 2011-014423, filed Jan. 26, 2011, the content of which is incorporated herein by reference.
2. Description of the Related Art
Japanese Patent Application Publication No. JPA 2007-36184 discloses a stacked semiconductor device, in which a plurality of semiconductor devices (semiconductor chips having through electrodes) are stacked on a circuit board and in which, by electrically connecting the plurality of semiconductor device via the through electrodes, it is possible to achieve high packaging density of the semiconductor chips on to the circuit board.
In the case of performing a semiconductor chip test before mounting to the circuit board, it is desired to cause probe needles to come into direct contact with the ends of the through electrodes. The result is that the ends of the through electrodes which are contacted by the probe needles are damaged. For this reason, imperfect connections can be caused between through electrodes that make connections between adjacent semiconductor devices when the semiconductor devices are stacked.